ISL62386HIEVAL1Z【PDF 19/20 页】EVAL BOARD FOR ISL62386HI 32TQFN

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ISL62386

LGATE (Pins 18 and 23)

The signal going through these traces are both high dv/dt

and high di/dt, with high peak charging and discharging

current. Route these traces in parallel with the trace from the

PGND pin. These two traces should be short, wide, and

away from other traces. There should be no other weak

signal traces in proximity with these traces on any layer.

BOOT (Pins 17 and 24), UGATE (Pins 16 and 25), and

PHASE (Pins 15 and 26)

The signals going through these traces are both high dv/dt

and high di/dt, with high peak charging and discharging

current. Route the UGATE and PHASE pins in parallel with

short and wide traces. There should be no other weak signal

traces in proximity with these traces on any layer.

Copper Size for the Phase Node

The parasitic capacitance and parasitic inductance of the

phase node should be kept very low to minimize ringing. It is

best to limit the size of the PHASE node copper in strict

accordance with the current and thermal management of the

application. An MLCC should be connected directly across

the drain of the upper MOSFET and the source of the lower

MOSFET to suppress the turn-off voltage spike.

19

FN6831.0

February 4, 2009

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